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INDIAN INSTITUTE OF TECHNOLOGY PALAKKAD
Kanjikode | Palakkad | Kerala - 678623
0491 209 2001 (Office) | info@iitpkd.ac.in

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Ms. JAYARANI M A
PhD Scholar
Electrical Engineering
9495235313
Research Area: Digital VLSI Circuits and Systems, Research Area: Digital VLSI Design, Research Area: VLSI Signal Processing Architectures for Enery-Efficient Event Detection and Monitoring Systems, Research Area: Biomedical Signal Processing, Research Area: Digital Signal Processing
  • Biosketch

    She is currently pursuing the Ph.D. degree with the Department of Electrical Engineering, Indian Institute of Technology Palakkad, Palakkad, India. She received the B.Tech. degree in Electronics and Communication Engineering from University of Kerala, Thiruvananthapuram, India, in 2011, and the M.E. degree in VLSI Design in 2013. She was an Assistant Professor for seven years with the Department of Electronics and Communication Engineering in various Government Engineering Colleges in Kerala, India (GEC Thrissur, GEC Sreekrishnapuram, and CUSAT Ernakulam) and Project Engineer with Solar Master Pvt Ltd, Ernakulam for 2 years. She was awarded a national Eligibility Test (NET)-Junior Research Fellowship (JRF) from UGC, Govt. of India in February 2022 and also qualified UGC-NET for Assistant Professor in Electronic Science. Her research interests include digital VLSI circuits and systems, VLSI signal processing architectures, and biomedical signal processing.

  • Research

    J. M. Anirudhan, M. Sabarimalai Manikandan, S. Mula and L. R. Cenkeramaddi, "Resource-Efficient Compressive PPG Sensing Encoders with Best Sensing Matrix and Sparse Recovery Algorithm for IoT Wearable and Edge Devices," in IEEE Access, doi: 10.1109/ACCESS.2025.3562291.

    J. M. Anirudhan, M. S. Manikandan and S. Mula, "Effective Sparse Reconstruction Algorithms for Compressed ECG Sensing with Deterministic Binary Block Diagonal Sensing Matrix," 2024 16th International Conference on Electronics, Computers and Artificial Intelligence (ECAI), Iasi, Romania, 2024, pp. 1-6, doi: 10.1109/ECAI61503.2024.10607498.

    J. M A, M. S. Manikandan and S. Mula, "Performance Evaluation of Sparse Recovery Algorithms for Efficient Signal Reconstruction in Compressed PPG Sensing Node," 2023 IEEE 9th International Conference on Smart Instrumentation, Measurement and Applications (ICSIMA), Kuala Lumpur, Malaysia, 2023, pp. 36-41, doi: 10.1109/ICSIMA59853.2023.10373546.

    M. A. Jayarani and M. Jagadeeswari, "A novel fault detection and correction technique for memory applications," 2013 International Conference on Computer Communication and Informatics, Coimbatore, India, 2013, pp. 1-6, doi: 10.1109/ICCCI.2013.6466152.

    Jayarani, M. A., and M. Jagadeeswari. "A Robust and Efficient Method For Error Detection And Correction In Memories." International Journal of Computer Applications 63.16 (2013).

  • Additional Information

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